1. Field of the Invention
The present invention relates to a unit gain buffer to reduce the layout area of the data driver in LCD, further to be preferably applied to the new TFT-LCD processing of low temperature poly-silicon.
2. Background of the Invention
Recently, the TFT-LCD is popularly applied to the computer, communication, and consumer product due to the image processor and monitor are greatly improved under the optoelectronics and the semiconductors make progress. In addition to the desk top personal computer monitor and the portable computer screen, the mobile phone, PDA, and palm PC are all using the LCD panel frequently. Relatively, the drivers that used to drive the LCD panel become more important in the LCD filed.
The main drivers in the normally TFT-LCD driver circuits include the scan driver and the data driver. In the data driver, the signals are transmitted in the digital signal type. When the signals drive the every one pixel of the TFT, the signals must be changed into the analog type to driver the pixels of the TFT. Generally, the data drivers use a digital-to-analog converter to transfer the digital signals into the analog signals to drive the pixel. In the TFT-LCD panel, every one data line needs one stage of the data driver to drive. But the digital-to-analog converters can not driver the next large load likes as the data line of the display panel. There always need a unit gain buffer to perform the data line driving for every stage of the driver.
Presently, the data drivers use the OP amplifier (OP AMP) in the negative feedback connection to be a unit gain buffer to drive the data line. The prior art of the unit gain buffer shown in FIG. 1, is related about the conventional one stage data driver 30 for one data line of TFT-LCD panel. The data driver 30 comprises a digital-to-analog converter (D/A converter) 10 coupled to a unit gain buffer 20. The unit gain buffer 20 consist of an OP 22 connected in the negative feedback network to form a unit gain.
The main disadvantage of FIG. 1 is that the layout area of the driver circuit be large. When the data driver 30 uses the OP 22, even use the lo simplest two stage OP amplifiers, we always need the compensation capacitor to compensate the feedback frequency response in the driver circuit. The compensation capacitor results in larger layout area of the driver circuit. Although some OP amplifiers connection type dot not need the compensation capacitor connection, the numbers of the transistor gates of the other OP amplifier connection are more than the two stages type""s. So those OP amplifier connection types either can not to reduce the layout area of the driver circuit.
The different driver circuits of the data driver in the TFT-LCD panel further include using the source follow connection to be a driver. The source follow connection driver comprises the NMOS and PMOS connection, further comprises the switching element connection. The using of the switching circuit make the driver circuit be more complex and need larger layout area then this invention. This invention proposes a unit gain buffer, which only use the PMOS transistor connection. By using this invention, the driver circuit layout area can be reduced under the driving power, the driving rate and the voltage level precision in the same situation.
The present invention relates to a unit gain buffer of a data driver in the TFT-LCD panel, which consisted of plurality PMOS transistor connection. There is no feedback network in this invention to avoid the use of the compensation capacitor.
That is, the primary object of this invention is to reduced the buffer layout area of data driver in the TFT-LCD under the situations of the driving power, the driving speed and the voltage level precision not be affected.
The other object of this invention is mainly to be applied to the new TFT-LCD processing of low temperature poly-silicon to reduce the buffer layout area of data driver.
In order to achieve the purpose described above, the unit gain buffer of TFT-LCD panel data driver in this invention including an input transistor M1 connected to a constant current source I1 via the source pole of M1. The gate pole of M1 being the input Vin of the unit gain buffer.
There is also a high bias transistor consisted of transistors M2 and M3 with series connection in the unit gain buffer, and the series connection point is mark A. The gate pole of M3 connected to Vin. The source pole of M2 connected to the constant current source I1. Further the gate pole of M2 connected to the drain pole of M3 and with a constant current source I2.
The output of the unit gain buffer is an output transistor M4 that connected to a constant current source I3 via the drain pole of M4. The drain pole of M4 is to be the output voltage Vout of the unit gain buffer and connected to the gate pole of M4. The source pole of M4 connected to the connection point A between M2 and M3.
As mention above, the voltage of point A is almost the same as the input Vin, there is only difference Vgs of M3 between the point A and Vin, that is Vin=VAxe2x88x92Vgs3. By using the M4 transistor, we can get the Vout=VA+Vgs4 and let the Vgs3 is almost the same as Vgs4, then Vout is almost the same as Vin.
For the preferred embodiment, the described input transistor M1 is using PMOS transistor operating in the saturation region due to the Vgd is more than zero voltage under normally operation. Further the M2 and M3 are also using the PMOS transistors operating in the saturation region under/normally operation.
For the preferred embodiment, when the Vout and Vin of the described unit gain buffer are all in low level, and then the Vin is changed into high level suddenly, the M1 and M3 being changed into OFF state immediately. The constant current source I1 charging into the load via the M2 and M4 that form a charging current path.
For the preferred embodiment, when the Vout and Vin are all in high level, and then the Vin is changed into low level suddenly, the M1 is changed into linear region immediately and produces a large current. The large current flows into the drain pole of M4 via the N-well contact to output. That is the large current is from drain pole into body pole to form a current path, and this is the same as M2 to form a current path, so the M2 and M4 produce a discharging current path.
For the preferred embodiment, the unit gain buffer applied to the low temperature poly-silicon TFT fabrication process. Wherein the Vout and Vin in are all in high level and then the Vin is changed into low level suddenly, there is only constant current source I3 provided discharge mainly, further the M4 leakage current is also to form a discharge current path.